HCS08 datasheet(101/198 Pages) NXP

101 / 198 page

Analog-to-Digital Converter (S08ADC10V1)

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

101

8.3.2

Status and Control Register 2 (ADCSC2)

The ADCSC2 register is used to control the compare function, conversion trigger and conversion active

of the ADC module.

Figure 8-5. Status and Control Register 2 (ADCSC2)

00111

AD7

10111

AD23

01000

AD8

11000

AD24

01001

AD9

11001

AD25

01010

AD10

11010

AD26

01011

AD11

11011

AD27

01100

AD12

11100

Reserved

01101

AD13

11101

VREFH

01110

AD14

11110

VREFL

01111

AD15

11111

Module disabled

RADACT

ADTRG

ACFE

ACFGT

1 Bits 1 and 0 are reserved bits that must always be written to 0.

Reset:

= Unimplemented or Reserved

Table 8-4. ADCSC2 Register Field Descriptions

Field

Description

ADACT

Conversion Active — ADACT indicates that a conversion is in progress. ADACT is set when a conversion is

initiated and cleared when a conversion is completed or aborted.

0 Conversion not in progress

1 Conversion in progress

ADTRG

Conversion Trigger Select — ADTRG is used to select the type of trigger to be used for initiating a conversion.

Two types of trigger are selectable: software trigger and hardware trigger. When software trigger is selected, a

conversion is initiated following a write to ADCSC1. When hardware trigger is selected, a conversion is initiated

following the assertion of the ADHWT input.

0 Software trigger selected

1 Hardware trigger selected

Figure 8-4. Input Channel Select (continued)

ADCH

Input Select

ADCH

Input Select

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