HCS08 datasheet(147/198 Pages) NXP

147 / 198 page

Timer/Pulse-Width Modulator (S08TPMV2)

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

147

All TPM channels are programmable independently as input capture, output compare, or buffered

edge-aligned PWM channels.

11.2

External Signal Description

When any pin associated with the timer is configured as a timer input, a passive pullup can be enabled.

After reset, the TPM modules are disabled and all pins default to general-purpose inputs with the passive

pullups disabled.

11.2.1

External TPM Clock Sources

When control bits CLKSB:CLKSA in the timer status and control register are set to 1:1, the prescaler and

consequently the 16-bit counter for TPMx are driven by an external clock source, TPMxCLK, connected

to an I/O pin. A synchronizer is needed between the external clock and the rest of the TPM. This

synchronizer is clocked by the bus clock so the frequency of the external source must be less than one-half

the frequency of the bus rate clock. The upper frequency limit for this external clock source is specified to

be one-fourth the bus frequency to conservatively accommodate duty cycle and phase-locked loop (PLL)

or frequency-locked loop (FLL) frequency jitter effects.

On some devices the external clock input is shared with one of the TPM channels. When a TPM channel

is shared as the external clock input, the associated TPM channel cannot use the pin. (The channel can still

be used in output compare mode as a software timer.) Also, if one of the TPM channels is used as the

external clock input, the corresponding ELSnB:ELSnA control bits must be set to 0:0 so the channel is not

trying to use the same pin.

11.2.2

TPMxCHn — TPMx Channel n I/O Pins

Each TPM channel is associated with an I/O pin on the MCU. The function of this pin depends on the

configuration of the channel. In some cases, no pin function is needed so the pin reverts to being controlled

by general-purpose I/O controls. When a timer has control of a port pin, the port data and data direction

registers do not affect the related pin(s). See the Pins and Connections chapter for additional information

about shared pin functions.

11.3

The TPM includes:

•

An 8-bit status and control register (TPMxSC)

•

A 16-bit counter (TPMxCNTH:TPMxCNTL)

•

A 16-bit modulo register (TPMxMODH:TPMxMODL)

Each timer channel has:

•

An 8-bit status and control register (TPMxCnSC)

•

A 16-bit channel value register (TPMxCnVH:TPMxCnVL)

Refer to the direct-page register summary in the Memory chapter of this data sheet for the absolute address

assignments for all TPM registers. This section refers to registers and control bits only by their names. A

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