EM351-RTR datasheet(144/240 Pages) ETC2

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EM351 / EM357

9.3.13.3

Slave Mode: Trigger Mode

In trigger mode the counter starts in response to an event on a selected input.

In the following example, the up-counter starts in response to a rising edge on the TI2 input:

Configure channel 2 to detect rising edges on TI2:

• Configure the input filter duration. In this example, no filter is required so TIM_IC2F = 0000.

• The capture prescaler is not used for triggering, so it is not configured.

• The TIM_CC2S bits select the input capture source only, TIM_CC2S = 01 in the TIMx_CCMR1 register.

• Write TIM_CC2P = 0 in the TIMx_CCER register to validate the polarity and detect high level only.

Configure the timer in trigger mode: Write TIM_SMS = 110 in the TIMx_SMCR register.

Select TI2 as the input source by writing TIM_TS = 110 in the TIMx_SMCR register.

When a rising edge occurs on TI2, the counter starts counting on the internal clock and the INT_TIMTIF flag is

set. The delay between the rising edge on TI2 and the actual start of the counter is due to the

resynchronization circuit on the TI2 input.

Figure 9-29 illustrates the example in which the counter is started by a rising edge on TI2.

Figure 9-29. Control Circuit in Trigger Mode

9.3.13.4

Slave Mode: External Clock Mode 2 +Trigger Mode

External clock mode 2 can be used in combination with another slave mode (except external clock mode 1 and

encoder mode). In this case, the ETR signal is used as external clock input, and another input can be selected

as trigger input when operating in reset mode, gated mode or trigger mode. It is not recommended to select

ETR as TRGI through the TIM_TS bits of TIMx_SMCR register.

In the following example, shown in Figure 9-30, the up-counter is incremented at each rising edge of the ETR

signal as soon as a rising edge of TI1 occurs:

Configure the external trigger input circuit: Program the TIMx_SMCR register as follows:

• TIM_ETF = 0000: no filter.

• TIM_ETPS = 00: prescaler disabled.

• TIM_ETP = 0: detection of rising edges on ETR and TIM_ECE = 1 to enable the external clock

mode 2.

Configure the channel 1 to detect rising edges on TI, as follows:

• TIM_IC1F = 0000: no filter.

• The capture prescaler is not used for triggering and does not need to be configured.

• TIM_CC1S = 01 in the TIMx_CCMR1 register to select only the input capture source.

• TIM_CC1P = 0 in the TIMx_CCER register to validate the polarity (and detect rising edge only).

Configure the timer in trigger mode: WriteTIM_SMS = 110 in the TIMx_SMCR register.

Select TI1 as the input source by writing TIM_TS = 101 in the TIMx_SMCR register.

9-24

120-035X-000D

Preliminary

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