| 전자부품 데이터시트 검색엔진 |
|
6402 데이터시트(PDF) 47 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
6402 데이터시트(HTML) 47 Page - Intel Corporation |
|
47 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 47 Electrical, Power, and Thermal 4.4.6 tCVA, tCVB, tECVA and tECVB Parameter Description The parameters tCVA and tCVB specify the time that command is valid after and before CLK. tCVA stands for the time that the Command is Valid After the CLK/CLK crossing point. tCVA is used for CA/CLK hold calculations (tIH). tCVB stands for the time that the Command is Valid Before the CLK/CLK crossing point. tCVB is used for CA/CLK setup calculations (tIS). Table 4-4 shows tCVA and tCVB. tECVA and tECVB apply in early mode. For DIMMs with 36 devices, the command, address and control signals can be shifted by 1/6 clock in early mode. Table 4-5 shows tECVA and tECVB. 4.4.7 tDQSCK Timing Parameter Description tDQSCK indicated the CLK to DQS delay. This value is used for tDQSS, tDSS and tDSH timing calculations. In order to determine these numbers accurately, package parameters must be taken into account. This adjusts the minimum time by -110 ps and the maximum by -70 ps. Figure 4-3. tjit and tjitHP Timing Diagram FromAMB tCK/2 tjitHP tCK tjit CLK/CLK Figure 4-4. tCVA and tCVB Timing Diagram Figure 4-5. tECVA and tECVB Timing Diagram FromAMB CAFrom AMB tCVA tCVB CLK/CLK From AMB CA From AMB tECVA tECVB CLK/CLK |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |