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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC24F16KA102 데이터시트(PDF) 21 Page - Microchip Technology |
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PIC24F16KA102 데이터시트(HTML) 21 Page - Microchip Technology |
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21 / 48 page  PIC24FXXKAXXX © 2008 Microchip Technology Inc. Advance Information DS39919A-page 21 3.12 Verifying Code Memory, Data EEPROM Memory and Configuration Registers To verify the code memory, read the code memory space and compare it with the copy held in the programmer’s buffer. To verify the data EEPROM and Configuration registers, follow the similar procedure. Figure 3-10 illustrates the verify process flowchart. Memory reads occur 1 byte at a time, hence 2 bytes must be read to compare with the word in the programmer’s buffer. Refer to Section 3.9 “Reading Code Memory” for implementation details of reading code memory. On the same lines, the data EEPROM and Configuration registers can be verified. FIGURE 3-10: VERIFY CODE MEMORY FLOW 3.13 Reading the Application ID Word The Application ID Word is stored in address 8005BEh in the executive code memory. To read this memory location, use the SIX control code to move this program memory location to the VISI register. Then, the REGOUT control code must be used to clock the contents of the VISI register out of the device. Table 3-12 provides the corresponding control and instruction codes that must be serially transmitted to the device to perform this operation. After the programmer has clocked out the Application ID Word, it must be inspected. If the Application ID has the value, BBh, the programming executive resides in the memory and the device can be programmed using the mechanism described in Section 4.0 “Device Programming – Enhanced ICSP”. However, if the Application ID has any other value, the programming executive does not reside in the memory; it must be loaded to memory before the device can be programmed. Section 5.4 “Programming the Programming Executive to Memory” describes the procedure for loading the programming executive to memory. 3.14 Exiting ICSP Mode Exit the Program/Verify mode by removing VIH from MCLR/VPP as illustrated in Figure 3-11. The only requirement to exit is that an interval of P16 should elapse between the last clock and program signals on PGCx and PGDx before removing VIH. FIGURE 3-11: EXITING ICSP™ MODE Note: Code memory should be verified immediately after writing if code protection is enabled. Since Configuration registers include the device code protection bit, the device will not be readable or verifiable if a device Reset occurs after the code-protect bits are set (value = 0). Read Low Byte Read High Byte Does Word = Expect Data? All code memory verified? No Yes No Set TBLPTR = 0 Start Yes End with Post-Increment with Post-Increment Failure Report Error MCLR/VPP P16 PGDx PGD = Input PGCx VDD VIH/VIHH VIH P17 |
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