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PIC24F16KA102 데이터시트(PDF) 16 Page - Microchip Technology |
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PIC24F16KA102 데이터시트(HTML) 16 Page - Microchip Technology |
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16 / 48 page ![]() PIC24FXXKAXXX DS39919A-page 16 Advance Information © 2008 Microchip Technology Inc. 3.8 Writing Configuration Registers The procedure for writing the Configuration registers is the same as for writing code memory. The only differ- ence is that, only one word is programmed in each operation. When writing Configuration registers, one word is programmed during each operation, only work- ing register, W0, is used as a temporary holding register for the data to be programmed. Table 3-7 provides the default values of the Configuration registers. Table 3-7 provides the ICSP programming details for programming the Configuration registers, including the serial pattern with the ICSP command code, which must be transmitted LSB first using the PGCx and PGDx pins (see Figure 3-2). In Step 1 of Table 3-8, the Reset vector is exited. In Step 2, the NVMCON register is initialized for programming code memory. In Step 3, the 24-bit starting destination address for programming is loaded into the TBLPAG register and W7 register. TABLE 3-7: DEFAULT VALUES FOR CONFIGURATION REGISTER SERIAL INSTRUCTION Note: The TBLPAG register is hard-coded to 0xF8 (the upper byte address of all locations of the Configuration registers). Note: The TBLPAG register must be loaded with F8h. Configuration Registers Value FBS(3) 0Fh FGS 03h FOSCSEL 87h FOSC FFh FWDT DFh FPOR(1) FBh FICD(2,3) C3h FDS(4) FFh Note 1: The I2C2SEL bit (FPOR<4>) is not implemented on PIC24FXXKAX01 and PIC24FXXKAX00 devices and should be programmed as ‘1’. 2: The FICD<6> bit is a reserved bit and should be programmed as ‘1’. 3: The Configuration registers, FBS and FICD, are reserved locations on PIC24F04KA2XX devices, and should be programmed with the default value given above. 4: The RTCSOSC bit (FDS<5>) is not implemented on PIC24F04KA2XX devices, and should be programmed as ‘1’. |
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