XPC8260ZUIFBC datasheet(17/50 Pages) FREESCALE

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MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0

Freescale Semiconductor

Electrical and Thermal Characteristics

Figure 6 shows the SCC/SMC/SPI/I2C internal clock.

Figure 6. SCC/SMC/SPI/I2C Internal Clock Diagram

Figure 7 shows TDM input and output signals.

Figure 7. TDM Signal Diagram

BRG_OUT

SCC/SMC/SPI/I2C input signals

SCC/SMC/SPI/I2C output signals

sp18a

sp19a

sp38a/sp39a

(See note.)

Note: There are four possible timing conditions for SCC and SPI:

1. Input sampled on the rising edge and output driven on the rising edge (shown).

2. Input sampled on the rising edge and output driven on the falling edge.

3. Input sampled on the falling edge and output driven on the falling edge.

4. Input sampled on the falling edge and output driven on the rising edge.

Serial CLKin

TDM input signals

TDM output signals

sp20

sp21

sp40/sp41

Note: There are four possible TDM timing conditions:

1. Input sampled on the rising edge and output driven on the rising edge (shown).

2. Input sampled on the rising edge and output driven on the falling edge.

3. Input sampled on the falling edge and output driven on the falling edge.

4. Input sampled on the falling edge and output driven on the rising edge.

XPC8260ZUIFBC 데이터시트(PDF) 17 Page - Freescale Semiconductor, Inc