AN4228 datasheet(17/90 Pages) STMICROELECTRONICS

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DocID024110 Rev 5

17/90

AN4228

Peripheral migration

3.4

Reset and clock controller (RCC) interface

The main differences related to the RCC (Reset and clock controller) in the STM32F3 series

versus STM32F1 series are presented in Table 9.

CAN2

APB1

0x40006 800

CAN1

APB1

0x4000 6400

APB1

0x4000 6400

UART5

0x4000 5000

0x40005000

UART4

0x4000 4C00

0x40004C00

I2S2ext

0x4000 4000

TIM13

APB1

0x4000 1C00

TIM12

0x4000 1800

TIM5

0x4000 0C00

0x40000 C00

BKP registers

0x4000 6C00

AFIO

APB2

0x4001 0000

NA = not applicable

Table 8. IP bus mapping differences between STM32F3 and STM32F1 series(1) (continued)

Peripheral

STM32F30xx

STM32F37x

STM32F1 series

Bus

Base

address

Bus

Base

address

Bus

Base address

Table 9. RCC differences between STM32F1 and STM32F3 series

RCC

STM32F1 series

STM32F3 series

HSE

3 - 25 MHz depending on the product

line used

4 - 32 MHz

PLL

– Connectivity line: main PLL +

2 PLLs for I2S, Ethernet and OTG

FS clock

– Other product lines: main PLL

Main PLL

RTC clock

source

LSI, LSE or HSE/128

LSI, LSE or HSE clock divided by 32

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