CS89712 datasheet(130/170 Pages) CIRRUS

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CS89712

130

DS502PP2

3.18.15 Self Status Register (SelfST, address offset 136h)

SelfST reports the status of the EEPROM interface and the initialization process.

Reset value is: 0000 0000 0001 0110

5:0

INITD

3.3V Active

010110

EEsize

RSVD

EEPROM OK

EEPROM present

SIBUSY

Bit

Description

5:0

010110: These bits provide an internal address used by the CS89712 to identify this as register

16, the Self Status Register. When reading this register, these bits will be 010110, where the

LSB corresponds to Bit 0.

3,3VActive: If the CS89712 is operating on a 3.3 V supply, this bit is set. If the CS89712 is

operating on a 5V supply, this bit is clear.

INITD: If set, the CS89712 initialization, including read-in of the EEPROM, is complete.

SIBUSY: If set, the EECS output pin is high indicating that the EEPROM is currently being read

or programmed. The software must not write to Ethernet Port offset address 0040h nor 0042h

until SIBUSY is clear.

EEPROMpresent: If the EEDataIn pin is low after reset, there is no EEPROM present, and the

EEPROMpresent bit is clear. If the EEDataIn pin is high after reset, the CS89712 "assumes"

that an EEPROM is present, and this bit is set.

EEPROMOK: If set, the checksum of the EEPROM readout was OK.

RSVD: Reserved; must be a “0” when writing to this register.

EEsize: This bit shows the size of the attached EEPROM and is valid only if the EEPROMpre-

sent bit (Bit 9) and EEPROMOK bit (Bit A) are both set. If clear, the EEPROM size is either 128

words ('C56 or 'CS56) or 256 words (C66 or 'CS66). If set, the EEPROM size is 64 words ('C46

or 'CS46).

Table 80. Self Status

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