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CS89712 데이터시트(PDF) 162 Page - Cirrus Logic

부품명 CS89712
상세설명  HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER
PDF  170 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS89712 데이터시트(HTML) 162 Page - Cirrus Logic

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CS89712
162
DS502PP2
6.4 I/O Buffer Strength & Characteristics
All I/O buffers on the CS89712 are CMOS thresh-
old input bidirectional buffers except the oscillator
and power pads. For signals that are nominally in-
puts, the output buffer is only enabled during pin
test mode. All output buffers are three stated during
system (hi-Z) test mode. All buffers have a stan-
dard CMOS threshold input stage (apart from the
Schmitt-triggered inputs) and CMOS slew-rate-
controlled output stages to reduce system noise.
Table 92 defines the I/O buffer output characteris-
tics which will apply across the full range of tem-
perature and voltage (i.e., these values are for
3.3 V, +70
° C).
All propagation delays are specified at 50% VDD to
50% VDD, all rise times are specified as 10% VDD
to 90% VDD and all fall times are specified as 90%
VDD to 10% VDD.
Buffer Type
Drive Current
Propagation
Delay (Max)
Rise Time
(Max)
Fall Time
(Max)
Load
Address outputs
±12 mA
5
6
6
50 pF
Non-address outputs
±4 mA
7
14
14
50 pF
Table 92. I/O Buffer Output Characteristics



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