| 전자부품 데이터시트 검색엔진 |
|
AR8327-AL1A-R 데이터시트(PDF) 264 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
AR8327-AL1A-R 데이터시트(HTML) 264 Page - List of Unclassifed Manufacturers |
|
264 / 394 page ![]() 264 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch Atheros Communications, Inc. 264 • June 2011 COMPANY CONFIDENTIAL 3.7.90 ACL_RATE_CTRL0_3 Address 0x0A18 SFT&HW RST Table 3-241, “ACL_3 Rate Control Register 0,” on page 264 summerizes the ACL_RATE_CTRL0_3 Register 0 Table 3-241. ACL_3 Rate Control Register 0 3.7.91 ACL_RATE_CTRL1_3 Address 0x0A1C SFT&HW RST Table 3-242, “ACL_3 Rate Control Register 1,” on page 265 summerizes the ACL_RATE_CTRL1_3 Register 1 17:15 R/W 0 ACL_EBS_2 Excess burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_EIR_2 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. Bit R/W Inital Value Mnemonic Description Bit R/W Inital Value Mnemonic Description 31:18 R/O 0 RESERVED 17:15 R/W 0 ACL_CBS_3 Commited burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_CIR_3 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |