AR8327-AL1A-R datasheet(57/394 Pages) ETC2

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Atheros Communications, Inc.

AR8327/AR8327N Seven-port Gigabit Ethernet

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3. Register Descriptions

Table 3-1 shows the reset types used in this

document.

3.1 Register Address Space (Address Range 0x0000 ~ 0x00FC)

Table 3-2 summarizes the register address

space occupied by the registers.

Table 3-1.

Type

Description

remains set until a read operation is performed through the management interface or a reset

occurs.

remains cleared until a read operation is performed through the management interface or a reset

occurs.

Retain

Value written to a register field takes effect without a software reset.

RES

Reserved for future use. All reserved bits are read as zero, unless otherwise noted.

Read Only.

ROC

Read Only Clear. After a read, the register field is cleared to zero.

R/W

Read/Write.

RWC

Read/Write Clear on read. All bits are readable and writable. After a reset, or after the register is

read, the register field is reset to zero.

RWR

Read/Write Reset. All bits are readable and writable. After a reset, or after the register is read, the

RWS

Read/Write Set. All bits are readable and writable. After a reset, the register field is set to a non-

zero value specified in the text.

Self-Clear. Writing a one to this register causes the desired function to execute immediately, and

the register field clears to zero when the function is complete.

Update

The value written to the register field does not take effect until a software reset is executed. The

value can still be read after it is written.

Write Only. Reads to this type of register field return undefined data.

Table 3-2.

Name

Address

GLOBAL CONTROL REGISTER

0x0000~0x00FF

EEE CONTROL REGISTER

0x0100~0x01FF

PARSER CONTROL REGISTER

0x0200~0x03FF

ACL CONTROL REGISTER

0x0400~0x05FF

LOOKUP CONTROL REGISTER

0x0600~0x07FF

QM CONTROL REGISTER

0x0800~0x0BFF

PKT EDIT CONTROL REGISTER

0x0C00~0x0DFF

L3 CONTROL REGISTER

0x0E00~0x0FFF

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