AR8327-AL1A-R datasheet(74/394 Pages) ETC2

74 / 394 page

74 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

74 • June 2011

COMPANY CONFIDENTIAL

3.2.21

GOL_MAC_ADDR0

Address 0x0060

SFT&HW RST

Table 3-24 summarizes the GOL_MAC_ADDR0 Address 0 Register.

3.2.22

GOL_MAC_ADDR1

Address 0x0064

SFT&HW RST

Table 3-25 summarizes the GOL_MAC_ADDR1 Address 1 Register.

3.2.23

MAX_FRAME_SIZE

Address 0x0078

7:2

R/O

RESERVED

1:0

R/W

2’b11

BLINK_HIGH_TIME

When led blinking, these bits

determine led light time.

2'b00: 50% of blinking period. 250ms

for 2Hz, 125ms for 4Hz, 62.5ms for

8Hz.

2'b01: 12.5%

2'b10: 25%

2'b11: 75%

Table 3-23.

LED Control Register 3

Bit

R/W

Inital

Value

Mnemonic

Description

Table 3-24.

Global MAC Address 0 Register

Bit

R/O

Inital

Value

Mnemonic

Description

31:16

R/W

RESERVED

15:8

R/W

MAC_ADDR_BYTE4

Station address of switch, used as source address

in pause frame or other management frames.

7:0

R/W

0x01

MAC_ADDR_BYTE5

Table 3-25.

Global MAC Address 1 Register

Bit

R/O

Inital

Value

Mnemonic

Description

31:24

R/W

MAC_ADDR_BYTE0

23:16

R/W

MAC_ADDR_BYTE1

15:8

R/W

MAC_ADDR_BYTE2

7:0

R/W

MAC_ADDR_BYTE3

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