AR8327-AL1A-R datasheet(72/394 Pages) ETC2

72 / 394 page

72 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

72 • June 2011

COMPANY CONFIDENTIAL

Table 3-18 summerized the BIST_RECOVER Register.

3.2.16

SERVICE_TAG

Address 0x0048

SFT&HW RST

Table 3-19 summerizes the SERVICE_TAG Register.

3.2.17

LED_CTRL0

Address 0x0050

HW RST

Table 3-20 summerizes LED_CTRL0 Register 0.

3.2.18

LED_CTRL1

Address 0x0054

HW RST

Table 3-18.

Bist Recover Register

Bit

R/W

Inital

Value

Mnemonic

Description

R/W

BIST_RECOVER_EN

1'b1: enable hardware recover data

memory mbist error.

30:13

R/O

RESERVED

12:0

R/W

BIST_RECOVER_ADDR

Bist test error address of memory.

Table 3-19.

Service TAG Register

Bit

R/W

Inital

Value

Mnemonic

Description

31:18

R/W

RESERVED

R/W

SWITCH_STAG_MODE

Select switch work vlan mode.

1'b1: S-TAG mode

1'b0: C-TAG mode

R/O

RESERVED

15:0

R/W

SERVICE_TAG

This 16-bits is used to identify the

SERVICE tagged frame. When core

port is enabled.

Table 3-20.

LED Control Register 0

Bit

R/W

Inital

Value

Mnemonic

Description

31:16

R/W

0xCC35

LED_CTRL_RULE_1

PHY4 LED0 control rule

15:0

R/W

0xCC35

LED_CTRL_RULE_0

PHY0 ~PHY3 LED0 control rule

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