AR8327-AL1A-R datasheet(271/394 Pages) ETC2

271 / 394 page

Atheros Communications, Inc.

AR8327/AR8327N Seven-port Gigabit Ethernet

Switch

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271

Table 3-251, “ACL_8 Rate Control Register 0,” on page 271 summerizes the ACL_RATE_CTRL0_8

Table 3-251.

ACL_8 Rate Control Register 0

3.7.101 ACL_RATE_CTRL1_8

Address 0x0A44

SFT&HW RST)

Table 3-252, “ACL_8 Rate Control Register 1,” on page 271 summerizes the ACL_RATE_CTRL1_8

Table 3-252.

ACL_8 Rate Control Register 1

Bit

R/W

Inital

Value

Mnemonic

Description

31:18

R/O

RESERVED

17:15

R/W

ACL_CBS_8

Commited burst size for ingress rate

limit

14:0

R/W

0x7FFF

ACL_CIR_8

Ingress Rate Limit for all priority.

Rate is limited to times of 32kbps.

Default 15'h7FFF is for disable rate

limit for ingress. if these bits are set to

15'h0, no frame should be received in

from this port.

Bit

R/W

Inital

Value

Mnemonic

Description

31:24

R/O

RESERVED

R/W

ACL_BORROW_EN_8

Borrow enable

R/W

ACL_RATE_UNIT_8

1: Packets/ 0: bytes

R/W

ACL_CF_8

Coupling flag for ingress rate limit

R/W

ACL_CM_8

Color mode for ingress rate limit

19:18

R/W

2'b01

ACL_RATE_TIME_SLOT_8

ACL Ingress rate limit control timer

slot.

2'b00: 100us;

2'b01: 1ms

2'b10: 10ms

2'b11: 100ms

Notes: if port rate limit set to less than

96kbps, don't select 100us as time slot

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