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AR8327-AL1A-R 데이터시트(PDF) 368 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 데이터시트(HTML) 368 Page - List of Unclassifed Manufacturers |
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368 / 394 page ![]() 368 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch Atheros Communications, Inc. 368 • June 2011 COMPANY CONFIDENTIAL 3.10.26 Debug Register — System Mode Control Address Offset: 0x03 2MANU_SWITC H_ON Mode R/W DAC amplitude adjustment 1 = add +6% 0 = no increase HW Rst 1 SW Rst Retain 1 RES Mode R/W Reserved HW Rst 1 SW Rst Retain 0 RES Mode R/W Reserved HW Rst 0 SW Rst Retain Bit Symbol Type Description Table 3-391. Debug Register — System Mode Control Bit Symbol Type Description 15 RESERVED Mode R/W 0 HW Rst 0 SW Rst 0 14 RESERVED Mode R/W Reserved HW Rst 0 SW Rst Retain 13:9 RESERVED Mode R/W Reserved HW Rst 1 SW Rst 0 8 OUT_MDIO_S W Mode R/W Control the MDIO signal when POWER_DOWN mode is high 1 = MDIO is 1 0 = MDIO is valid, driven by inner state HW Rst 1 SW Rst Retain 7:4 RESERVED Mode R/W Reserved HW Rst 4’b1111 SW Rst Retain 3:0 RESERVED Mode R/W Reserved HW Rst 4’b1111 SW Rst Retain 7:5 RESERVED Mode R/W Reserved HW Rst 1 SW Rst Retain |
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