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VR4102 데이터시트(PDF) 174 Page - NEC |
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VR4102 데이터시트(HTML) 174 Page - NEC |
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174 / 701 page ![]() CHAPTER 6 EXCEPTION PROCESSING 174 Table 6-3. 64-Bit Mode Exception Vector Base Addresses Vector base address (virtual) Vector offset Cold Reset Soft Reset NMI 0xFFFF FFFF BFC0 0000 (BEV is automatically set to 1) 0x0000 Cache Error 0xFFFF FFFF A000 0000 (BEV = 0) 0xFFFF FFFF BFC0 0200 (BEV = 1) 0x0100 TLB Refill (EXL = 0) 0xFFFF FFFF 8000 0000 (BEV = 0) 0x0000 XTLB Refill (EXL = 1) 0xFFFF FFFF BFC0 0200 (BEV = 1) 0x0080 Other exceptions 0x0180 Table 6-4. 32-Bit Mode Exception Vector Base Addresses Vector base address (virtual) Vector offset Cold Reset Soft Reset NMI 0xBFC0 0000 (BEV is automatically set to 1) 0x0000 Cache Error 0xA000 0000 (BEV = 0) 0xBFC0 0200 (BEV = 1) 0x0100 TLB Refill (EXL = 0) 0x8000 0000 (BEV = 0) 0x0000 XTLB Refill (EXL = 1) 0xBFC0 0200 (BEV = 1) 0x0080 Other exceptions 0x0180 Examples 1. TLB Refill Exception Vector When BEV bit = 0, the vector base address (virtual) for the TLB Refill exception is in kseg0 (unmapped) space. — 0x8000 0000 in 32-bit mode — 0xFFFF FFFF 8000 0000 in 64-bit mode When BEV bit = 1, the vector base address (virtual) for the TLB Refill exception is in kseg1 (uncached, unmapped) space. — 0xBFC0 0200 in 32-bit mode — 0xFFFF FFFF BFC0 0200 in 64-bit mode This is an uncached, non-TLB-mapped space, allowing the exception handler to bypass the cache and TLB. |
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