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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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VR4102 데이터시트(PDF) 175 Page - NEC |
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VR4102 데이터시트(HTML) 175 Page - NEC |
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175 / 701 page  CHAPTER 6 EXCEPTION PROCESSING 175 Example 2. Cache Error Exception Vector When BEV bit = 0, the vector base address (virtual) for the Cache Error exception is in kseg1 (uncached, unmapped) space. — 0xA000 0000 in 32-bit mode — 0xFFFF FFFF A000 0000 in 64-bit mode When BEV bit = 1, the vector base address (virtual) for the Cache Error exception is in kseg1 (uncached, unmapped) space. — 0xBFC0 0200 in 32-bit mode — 0xFFFF FFFF BFC0 0200 in 64-bit mode This is an uncached, non-TLB-mapped space, allowing the exception handler to bypass the cache and TLB. |
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