HCS08 datasheet(35/290 Pages) MOTOROLA

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Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

MC9S08GB/GT

3.6 Stop Modes

One of three stop modes is entered upon execution of a STOP instruction when the STOPE bit in the

system option register is set. In all stop modes, all internal clocks are halted. If the STOPE bit is not set

when the CPU executes a STOP instruction, the MCU will not enter any of the stop modes and an illegal

opcode reset is forced. The stop modes are selected by setting the appropriate bits in SPMSC2.

Table 3-1 summarizes the behavior of the MCU in each of the stop modes.

3.6.1 Stop1 Mode

The stop1 mode provides the lowest possible standby power consumption by causing the internal circuitry

of the MCU to be powered down. To select entry into stop1 mode upon execution of a STOP instruction,

the user must set the PDC bit in SPMSC2 and clear the PPDC bit in SPMSC2.

When the MCU is in stop1 mode, all internal circuits that are powered from the voltage regulator are

turned off. The voltage regulator is in a low-power standby state, as is the ATD.

Exit from stop1 is done by asserting either of the wake-up pins on the MCU: RESET or IRQ. IRQ is always

an active low input when the MCU is in stop1, regardless of how it was configured before entering stop1.

Entering stop1 mode automatically asserts LVD. Stop1 cannot be exited until VDD >VLVDH/L rising (VDD

must rise above the LVI rearm voltage).

Upon wake-up from stop1 mode, the MCU will start up as from a power-on reset (POR). The CPU will

take the reset vector.

3.6.2 Stop2 Mode

The stop2 mode provides very low standby power consumption and maintains the contents of RAM and

the current state of all of the I/O pins. To select entry into stop2 upon execution of a STOP instruction, the

user must execute a STOP instruction while the PPDC and PDC bits in SPMSC2 are set.

Table 3-1 Stop Mode Behavior

Mode

PDC

PPDC

CPU, Digital

Peripherals,

FLASH

RAM

ICG

ATD

Regulator

I/O Pins

RTI

Stop1

Off

Disabled

(1)

NOTES:

1. Either ATD stop mode or power-down mode depending on the state of ATDPU.

Off

Reset

Off

Stop2

Off

Standby

Off

Disabled

Standby

States

held

Optionally on

Stop3

Don’t

care

Standby

Off(2)

2. Crystal oscillator can be configured to run in stop3. Please see the ICG registers.

Disabled

Standby

States

held

Optionally on

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