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HCS08 데이터시트(PDF) 61 Page - Motorola, Inc

부품명 HCS08
상세설명  Microcontrollers
PDF  290 Pages
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제조업체  MOTOROLA [Motorola, Inc]
홈페이지  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

HCS08 데이터시트(HTML) 61 Page - Motorola, Inc

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Data Sheet — MC9S08GB60/D V1.5
MOTOROLA
61
MC9S08GB/GT
4.6.5 FLASH Status Register (FSTAT)
Bits 3, 1, and 0 always read 0 and writes have no meaning or effect. The remaining five bits are status bits
that can be read at any time. Writes to these bits have special meanings that are discussed in the bit
descriptions.
Figure 4-8 FLASH Status Register (FSTAT)
FCBEF — FLASH Command Buffer Empty Flag
The FCBEF bit is used to launch commands. It also indicates that the command buffer is empty so that
a new command sequence can be executed when performing burst programming. The FCBEF bit is
cleared by writing a one to it or when a burst program command is transferred to the array for
programming. Only burst program commands can be buffered.
1 = A new burst program command may be written to the command buffer.
0 = Command buffer is full (not ready for additional commands).
FCCF — FLASH Command Complete Flag
FCCF is set automatically when the command buffer is empty and no command is being processed.
FCCF is cleared automatically when a new command is started (by writing 1 to FCBEF to register a
command). Writing to FCCF has no meaning or effect.
1 = All commands complete
0 = Command in progress
FPVIOL — Protection Violation Flag
FPVIOL is set automatically when FCBEF is cleared to register a command that attempts to erase or
program a location in a protected block (the erroneous command is ignored). FPVIOL is cleared by
writing a 1 to FPVIOL.
1 = An attempt was made to erase or program a protected location.
0 = No protection violation.
FACCERR — Access Error Flag
FACCERR is set automatically when the proper command sequence is not followed exactly (the
erroneous command is ignored), if a program or erase operation is attempted before the FCDIV register
has been initialized, or if the MCU enters stop while a command was in progress. For a more detailed
discussion of the exact actions that are considered access errors, see 4.4.5 Access Errors. FACCERR
is cleared by writing a 1 to FACCERR. Writing a 0 to FACCERR has no meaning or effect.
1 = An access error has occurred.
0 = No access error.
Bit 7
6
54321
Bit 0
Read:
FCBEF
FCCF
FPVIOL FACCERR
0
FBLANK
0
0
Write:
Reset:
1
1
000000
= Unimplemented or Reserved



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