 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
HCS08 데이터시트(PDF) 95 Page - Motorola, Inc |
|
|
|||||||||||||||||||||||||||||
HCS08 데이터시트(HTML) 95 Page - Motorola, Inc |
|
|
95 / 290 page  Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 95 MC9S08GB/GT Figure 6-7 ICG Register Set Table 6-5 ICGOUT Frequency Calculation Options Clock Scheme fICGOUT P Note SCM — self-clocked mode (FLL bypassed internal) fICGDCLK / R NA Typical fICGOUT = 8 MHz out of reset FBE — FLL bypassed external fext / R NA FEI — FLL engaged internal (fIRG / 7)* 64*N / R 64 Typical fIRG = 243 kHz 4 ≤ N = 18 FEE — FLL engaged external fext * P * N / R Range = 0 ; P = 64 Range = 1; P = 1 4 <= N <= 18 1 <= R <= 128 Table 6-6 MFD and RFD Decode Table MFD Value Multiplication Factor (N) RFD Division Factor (R) 000 4 000 ÷1 001 6 001 ÷2 010 8 010 ÷4 011 10 011 ÷8 100 12 100 ÷16 101 14 101 ÷32 110 16 110 ÷64 111 18 111 ÷128 Register Bit 7 654321 Bit 0 ICGC1 0 RANGE REFS CLKS OSCSTEN 0(1) NOTES: 1. This bit is reserved for Motorola internal use only. Any write operations to this register should write a 0 to this bit. 0 ICGC2 LOLRE MFD LOCRE RFD ICGS1 CLKST REFST LOLS LOCK LOCS ERCS ICGIF ICGS2 0 0 0 0 0 0 0 DCOS ICGFLTU 0 0 0 0 FLT ICGFLTL FLT ICGTRM TRIM = Unimplemented or Reserved |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
