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MPC8569E 데이터시트(PDF) 74 Page - Freescale Semiconductor, Inc |
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MPC8569E 데이터시트(HTML) 74 Page - Freescale Semiconductor, Inc |
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74 / 127 page ![]() MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1 Ethernet Management Interface Freescale Semiconductor 74 The following figure shows the data and command input AC timing diagram. Figure 33. QUICC Engine Block IEEE 1588 Input AC Timing (SOF TRIG) 2.7 Ethernet Management Interface The electrical characteristics specified in this section apply to the MII management interface signals management data input/output (MDIO) and management data clock (MDC). The electrical characteristics for GMII, RGMII, TBI, and RTBI are specified in Section 2.6, “Ethernet Interface.” 2.7.1 MII Management DC Electrical Characteristics The MDC and MDIO are defined to operate at a supply voltage of 3.3 V. The following table provides the DC electrical characteristics for MDIO and MDC. Table 42. MII Management DC Electrical Characteristics At recommended operating conditions with LVDD = 3.3 V Parameter Symbol Min Max Unit Notes Input high voltage VIH 2.0 — V — Input low voltage VIL —0.90 V — Input high current (LVDD = Max, VIN = 2.1 V) IIH —40 μA1 Input low current (LVDD = Max, VIN = 0.5 V) IIL –600 — μA1 Output high voltage (LVDD = Min, IOH = –4.0 mA) VOH 2.4 — V — Output low voltage (LVDD = Min, IOL = 4.0 mA) VOL —0.4 V — Note: 1. The symbol VIN, in this case, represents the LVIN symbol referenced in Table 2 and Table 3. TX_CLK/RX_CLK QE_PTP_SOF_TX_IN/ tTTX/RXCLK QE_PTP_SOF_RX_IN tT1588TRIGH tT1588CLKH |
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