MPC8569E datasheet(76/127 Pages) FREESCALE

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MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

HDLC, BISYNC, Transparent, and Synchronous UART Interfaces

Freescale Semiconductor

2.8

HDLC, BISYNC, Transparent, and Synchronous UART Interfaces

This section describes the DC and AC electrical specifications for the high level data link control (HDLC), BISYNC,

transparent, and synchronous UART interfaces of the MPC8569E.

2.8.1

HDLC, BISYNC, Transparent, and Synchronous UART DC Electrical

Characteristics

The following table provides the DC electrical characteristics for the HDLC, BISYNC, Transparent, and synchronous UART

interfaces.

2.8.2

HDLC, BISYNC, Transparent, and Synchronous UART AC Timing

Specifications

The following table provides the input and output AC timing specifications for the HDLC, BISYNC, and Transparent protocols.

Table 44. HDLC, BISYNC, and Transparent DC Electrical Characteristics

For recommended operating conditions, see Table 3

Parameter

Symbol

Min

Max

Unit

Notes

Input high voltage

VIH

2—

Input low voltage

VIL

—0.8

Input current (OVIN = 0 V or OVIN = OVDD)IIN

—±40

μA2

Output high voltage (OVDD = min, IOH = –2 mA)

VOH

2.4

—

Output low voltage (OVDD = min, IOL = 2 mA)

VOL

—0.4

—

Note:

1. The min VILand max VIH values are based on the respective min and max OVIN values found in Table 3.

2. The symbol OVIN represents the input voltage of the supply. It is referenced in Table 3.

Table 45. HDLC, BISYNC, and Transparent AC Timing Specifications

For recommended operating conditions, see Table 3

Characteristic

Symbol1

Min

Max

Unit

Notes

Outputs—Internal clock delay

tHIKHOV

05.5

Outputs—External clock delay

tHEKHOV

18.4

Outputs—Internal clock high Impedance

tHIKHOX

05.5

Outputs—External clock high Impedance

tHEKHOX

Inputs—Internal clock input setup time

tHIIVKH

6—

—

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