PM0056 datasheet(50/156 Pages) STMICROELECTRONICS

50 / 156 page

The Cortex-M3 instruction set

PM0056

50/156

DocID15491 Rev 5

3.2

Intrinsic functions

ANSI cannot directly access some Cortex-M3 instructions. This section describes intrinsic

functions that can generate these instructions, provided by the CMIS and that might be

provided by a C compiler. If a C compiler does not support an appropriate intrinsic function,

you might have to use an inline assembler to access some instructions.

The CMSIS provides the intrinsic functions listed in Table 21 to generate instructions that

ANSI cannot directly access.

WFE

—

Wait for event

—

3.9.11 on

page 103

WFI

—

Wait for interrupt

—

3.9.12 on

page 104

Table 20. Cortex-M3 instructions (continued)

Mnemonic

Operands

Brief description

Flags

Section

Table 21. CMSIS intrinsic functions to generate some Cortex-M3 instructions

Instruction

CMSIS intrinsic function

CPSIE I

void __enable_irq(void)

CPSID I

void __disable_irq(void)

CPSIE F

void __enable_fault_irq(void)

CPSID F

void __disable_fault_irq(void)

ISB

void __ISB(void)

DSB

void __DSB(void)

DMB

void __DMB(void)

REV

uint32_t __REV(uint32_t int value)

REV16

uint32_t __REV16(uint32_t int value)

REVSH

uint32_t __REVSH(uint32_t int value)

RBIT

uint32_t __RBIT(uint32_t int value)

SEV

void __SEV(void)

WFE

void __WFE(void)

WFI

void __WFI(void)

PM0056 데이터시트(PDF) 50 Page - STMicroelectronics

PM0056 데이터시트(HTML) 50 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL