TNETV2501INPGF datasheet(82/197 Pages) TI1

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Functional Overview

December 2002 − Revised November 2008

SPRS206K

3.10.4.4 EMIF Module Wake-up Procedure

If both the CPU and the EMIF are in idle, then the EMIF will come out of idle when the CPU is taken out of

idle. The CPU can be taken out of idle through the use of an NMI or an enabled external interrupt. External

interrupts can be enabled through the IER0 and IER1 registers.

If the CPU is not in idle, then the EMIF can be taken out of idle through either of the following two procedures:

Write ‘0’ to the PERI bit in ICR.

Execute the IDLE instruction.

All idled peripherals, including the EMIF, wake up.

Or:

Write ‘0’ to the EMIF bit in PICR.

The EMIF module will wake up.

3.10.4.5 IDLE2 Mode Wake-up Procedure

The 5501 can be taken completely out of IDLE2 mode by executing the following procedure.

CPU wakes up from idle through NMI or enabled external interrupt.

Write ‘0’ to all bits in the ICR.

Execute the IDLE instruction.

All internal clocks are enabled and all modules come out of idle.

3.10.4.6 IDLE3 Mode Wake-up Procedure

The 5501 can be taken completely out of IDLE3 mode by executing the following procedure.

CPU wakes up from idle through NMI or enabled external interrupt.

Write ‘0’ to all bits in the ICR.

Execute the IDLE instruction.

All internal clocks are enabled and all modules come out of idle.

Write ‘0’ to the PLLPWRDN and PLLRST bits in PLLCSR.

Wait for the PLL to relock by polling the LOCK bit or by setting up a LOCK interrupt.

Set the PLLEN bit in PLLCSR to ‘1’.

All internal clocks will now come from the PLL core.

NOTE: Step 3 can be modified to only wake up certain modules, see previous sections for

more information on the wake-up procedures for the 5501 modules.

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