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TNETV2501INPGF 데이터시트(PDF) 86 Page - Texas Instruments |
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TNETV2501INPGF 데이터시트(HTML) 86 Page - Texas Instruments |
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86 / 197 page ![]() Functional Overview 86 December 2002 − Revised November 2008 SPRS206K Table 3−27. IDLE Configuration Register Bit Field Description (Continued) BIT NAME DESCRIPTION RESET VALUE ACCESS BIT NO. CLKI 4 R/W 0 Device clock generator idle control bit. The CLKEI bit must be set to 1 along with the CLKI bit in order to properly place the device clock generator in idle. CLKI CLKEI 0 0 Device clock generator module remains active after execution of an IDLE instruction. 1 1 Device clock generator is disabled after execution of an IDLE instruction. Any other combination of CLKI and CLKEI is not valid. Setting CLKI to 1 and executing the IDLE instruction will generate a bus error interrupt if CLKEI is not set to 1. Disabling the clock generator provides the lowest level of power reduction by stopping the system clock. Whenever the clock generator is idled, the CLKEI, CPUI, MPI, ICACHEI, EMIFI, XPORTI, MPORTI, and IPORTI bits must be set to 1 in order to ensure a proper power-down mode. A bus error interrupt will be generated if the idle instruction is executed when CLKI = 1 and any of these bits are not set to 1. PERI 3 R/W 0 Peripheral Idle control bit PERI = 0: All peripheral modules become/remain active after execution of an IDLE instruction PERI = 1: All peripheral modules with 1 in PICR are disabled after execution of an IDLE instruction ICACHEI 2 R/W 0 ICACHE idle control bit ICACHEI = 0: ICACHE module remains active after execution of an IDLE instruction ICACHEI = 1: ICACHE module is disabled after execution of an IDLE instruction MPI 1 R/W 0 Master peripheral (DMA and HPI) idle control bit MPI = 0: DMA and HPI modules remain active after execution of an IDLE instruction MPI = 1: DMA and HPI modules are disabled after execution of an IDLE instruction CPUI 0 R/W 0 CPU idle control bit CPUI = 0: CPU module remains active after execution of an IDLE instruction CPUI = 1: CPU module is disabled after execution of an IDLE instruction |
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