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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AD9689-2000EBZ 데이터시트(PDF) 8 Page - Analog Devices |
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AD9689-2000EBZ 데이터시트(HTML) 8 Page - Analog Devices |
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8 / 134 page  AD9689 Data Sheet Rev. A | Page 8 of 134 DIGITAL SPECIFICATIONS AVDD1 = 0.975 V, AVDD1_SR = 0.975 V, AVDD2 = 1.9 V, AVDD3 = 2.5 V, DVDD = 0.975 V, DRVDD1 = 0.975 V, DRVDD2 = 1.9 V, SPIVDD = 1.9 V, −10°C ≤ TJ ≤ +120°C,1 unless otherwise noted. Typical specifications represent performance at TJ = 70°C (TA = 25°C). Table 3. Parameter Min Typ Max Unit CLOCK INPUTS (CLK+, CLK−) Logic Compliance LVDS/LVPECL Differential Input Voltage 300 800 1800 mV p-p Input Common-Mode Voltage 0.675 V Input Resistance (Differential) 106 Ω Input Capacitance 0.9 pF Differential Input Return Loss at 2.6 GHz 2 9.4 dB SYSTEM REFERENCE (SYSREF) INPUTS (SYSREF+, SYSREF−) Logic Compliance LVDS/LVPECL Differential Input Voltage 400 800 1800 mV p-p Input Common-Mode Voltage 0.675 2.0 V Input Resistance (Differential) 18 kΩ Input Capacitance (Differential) 1 pF LOGIC INPUTS (SDIO, SCLK, CSB, PDWN/STBY, FD_A/GPIO_A0, FD_B/GPIO_B0, GPIO_A1, GPIO_B1) Logic Compliance CMOS Logic 1 Voltage 0.65 × SPIVDD V Logic 0 Voltage 0 0.35 × SPIVDD V Input Resistance 30 kΩ LOGIC OUTPUTS (SDIO, FD_A, FD_B) Logic Compliance CMOS Logic 1 Voltage (IOH = 4 mA) SPIVDD − 0.45V V Logic 0 Voltage (IOL = 4 mA) 0 0.45 V SYNCHRONIZATION INPUT (SYNCINB+/SYNCINB−) Logic Compliance LVDS/LVPECL Differential Input Voltage 400 800 1800 mV p-p Input Common-Mode Voltage 0.675 2.0 V Input Resistance (Differential) 18 kΩ Input Capacitance 1 pF SYNCINB+ INPUT Logic Compliance CMOS Logic 1 Voltage 0.9 × DRVDD1 2 × DRVDD1 V Logic 0 Voltage 0.1 × DRVDD1 V Input Resistance 2.6 kΩ DIGITAL OUTPUTS (SERDOUTx±, x = 0 TO 7) Logic Compliance SST Differential Output Voltage 360 560 770 mV p-p Differential Termination Impedance 80 100 120 Ω 1 The junction temperature (TJ) range of −10°C to +120°C translates to an ambient temperature (TA) range of −40°C to +85°C. 2 Reference impedance = 100 Ω. |
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