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AD9689-2000EBZ 데이터시트(PDF) 86 Page - Analog Devices

부품명 AD9689-2000EBZ
상세설명  Dual Analog-to-Digital Converter
PDF  134 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9689-2000EBZ 데이터시트(HTML) 86 Page - Analog Devices

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AD9689
Data Sheet
Rev. A | Page 86 of 134
YES
UPDATE SETUP/HOLD
DETECTOR STATUS
(0x0128)
INCREMENT
SYSREF IGNORE
COUNTER
YES
NO
SYSREF
IGNORE
COUNTER
EXPIRED?
(0x0121)
SYSREF
ENABLED?
(0x0120)
NO
CLOCK
DIVIDER
>1?
(0x010B)
YES
INPUT
CLOCK DIVIDER
ALIGNMENT
REQUIRED?
CLOCK
DIVIDER
AUTO ADJUST
ENABLED?
YES
NO
NO
NO
YES
ALIGN CLOCK
DIVIDER PHASE
TO SYSREF
SYNCHRO-
NIZATION
MODE?
(0x01FF)
TIMESTAMP
MODE
NORMAL
MODE
YES
SYSREF INSERTED
IN JESD204B
CONTROL BITS
BACK TO START
BACK TO START
NO
JESD204B
LMFC
ALIGNMENT
REQUIRED?
DDC NCO
ALIGNMENT
ENABLED?
(0x0300)
YES
NO
ALIGN PHASE OF ALL
INTERNAL CLOCKS
(INCLUDING LMFC)
TO SYSREF
SYNC~
ASSERTED
SEND INVALID 8-BIT/
10-BIT CHARACTERS
(ALL 0s)
NO
YES
SEND K28.5
CHARACTERS
NORMAL
JESD204B
INITIALIZATION
SYSREF
ENABLED
IN CONTROL BITS?
(0x0559, 0x055A,
0x058F)
RESET
SYSREF IGNORE
COUNTER
START
SYSREF
ASSERTED?
YES
NO
ALIGN DDC NCO
PHASE
ACCUMULATOR
YES
SIGNAL
MONITOR
ALIGNMENT
ENABLED?
(0x026F)
ALIGN SIGNAL
MONITOR
COUNTERS
YES
NO
NO
SYSREF RESETS
RAMP TEST MODE
GENERATOR
RAMP
TEST MODE
ENABLED?
(0x0550)
YES
NO
INCREMENT
SYSREF COUNTER
(0x012A)
SYSREF
TIMESTAMP
DELAY
(0x0123)
SYSREF
MODE
(0x0120)
N-SHOT
MODE
CONTINUOUS
MODE
CLEAR SYSREF IGNORE COUNTER
AND DISABLE SYSREF
(CLEAR BIT 2 IN 0x0120)
Figure 147. SYSREF Capture Scenarios and Multichip Synchronization



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