AR8327-AL1A-R datasheet(380/394 Pages) ETC2

380 / 394 page

380 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

380 • June 2011

COMPANY CONFIDENTIAL

Table 3-406, “AN LP XNP Ability,” on page 380 summarizes the Register

Table 3-406.

AN LP XNP Ability

3.13.7

AN LP XNP Ability1

Address Offset: 0x01A, or 0d26

Device Address = 7

Table 3-407, “AN LP XNP Ability1,” on page 380 summarizes the Register

Table 3-407.

AN LP XNP Ability1

3.13.8

AN LP XNP Ability2

Address Offset: 0x01B, or 0d27

Device Address = 7

Table 3-408 summarizes the Register

3.13.9

EEE Advertisement

Address Offset: 0x3C (Hex)

Device Address = 7

Table , “,” on page 381 summarizes the Register

Bit

Symbol

Type

Description

15:0

Xnp_23

Mode

R/O

HW Rst

15’h0

SW Rst

15’h0

Bit

Symbol

Type

Description

15:0

Lp_xnp_2

Mode

R/O

Latched when lp_xnp_1 is read

HW Rst

15’h0

SW Rst

15’h0

Table 3-408.

AN LP XNP Ability2

Bit

Symbol

Type

Description

15:0

Lp_xnp_3

Mode

R/O

Latched when lp_xnp_1 is read

HW Rst

15’h0

SW Rst

15’h0

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