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FXLS93421 데이터시트(PDF) 75 Page - NXP Semiconductors |
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FXLS93421 데이터시트(HTML) 75 Page - NXP Semiconductors |
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75 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor ASYNC bit SOURCEID register Transmitted data Time slot start time Default start (PDCM_ RSPSTx[12:0] = 0x00) SOURCEID_0 CH0_SNSDATA0 PDCM_ RSPST0[12:0] Transmit Data with a start time of 20 µs SOURCEID_1 CH0_SNSDATA1 PDCM_ RSPST1[12:0] Transmit Data with a start time of 20 µs SOURCEID_2 CH1_SNSDATA0 PDCM_ RSPST2[12:0] Transmit Data with a start time of 20 µs 0 SOURCEID_3 CH1_SNSDATA1 PDCM_ RSPST3[12:0] Transmit Data with a start time of 20 µs Table 124. Asynchronous mode: Source ID response start time...continued In SPI and I2C mode, the PDCM_RSPSTx registers are readable and writable, but have no impact on device operation or performance. 11.2.18.2 Broadcast read command type selection bits (BRC_RSP[1:0]) The broadcast read command type selection bits select the broadcast read command types that the device responds to for each Source ID as shown in Table 125: BRC_RSP[1] BRC_RSP[0] Response 0 0 Respond to all Broadcast Read Commands 0 1 Respond to Broadcast Read Command 0 only 1 0 Respond to Broadcast Read Command 1 only 1 1 Respond to all Broadcast Read Commands Table 125. Broadcast read command type selection bits (BRC_RSP[1:0]) If a device is programmed to respond only to BRC0 or BRC1 commands, it will synchronize to alternate responses when BDM commands are received. • If the last command prior to a BDM command is a BRC0, a device programmed to respond only to BRC0 commands will not respond to the first BDM command and will then respond to every other BDM command until the next BRC command is received. • If the last command prior to a BDM command is a BRC0, a device programmed to respond only to BRC1 commands will respond to the first BDM command, and will then response to every other BDM command until the next BRC command is received. • If the last command prior to a BDM command is a BRC1, a device programmed to respond only to BRC0 commands will respond to the first BDM command, and will then response to every other BDM command until the next BRC command is received. • If the last command prior to a BDM command is a BRC1, a device programmed to respond only to BRC1 commands will not respond to the first BDM command and will then respond to every other BDM command until the next BRC command is received. In PSI5 mode, the BRC_RSP[1:0] bits are readable and writable, but have no impact on device operation or performance. In SPI and I2C mode, the BRC_RSP[1:0] bits are readable and writable, but have no impact on device operation or performance. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 75 / 254 |
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