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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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FXLS93421 데이터시트(PDF) 9 Page - NXP Semiconductors |
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FXLS93421 데이터시트(HTML) 9 Page - NXP Semiconductors |
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9 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor 7 Block diagram aaa-030564 BUS_I VBUF VSS SS_B SPI ARM AND PCM LOGIC ARM AND PCM LOGIC I2C BUSRTN IDATA IDATA RSENSE BUS_O DAISY CHAIN SWITCH DRIVER VBUF VREF BUFFER VOLTAGE REGULATOR REFERENCE VOLTAGE LOW VOLTAGE DETECTION OSCILLATOR OTP ARRAY VREG VREGA BUS_I CONTROL LOGIC SCLK/SCL MOSI MISO/SDA ARM/PCM0 ARM/PCM1 COMMAND DECODER SERIAL ENCODER OTP PROGRAMMING INTERFACE INTERNAL VOLTAGE REGULATOR BUSSW_L SINC FILTER ∑ CONVERTER OVER- DAMPED G-CELL OVER- DAMPED G-CELL OFFSET DAC IIR LPF HPF INTERPOLATION OFFSET MONITOR OUTPUT SCALING TRIM DIGITAL CLIPPING USER SENSE SCALING CH0 DSP SINC FILTER IIR LPF HPF INTERPOLATION OFFSET MONITOR OUTPUT SCALING TRIM DIGITAL CLIPPING USER SENSE SCALING CH1 DSP SELF TEST ∑ CONVERTER OFFSET DAC SELF TEST Figure 7. Dual channel internal block diagram FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 9 / 254 |
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