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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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FXLS93421 데이터시트(PDF) 80 Page - NXP Semiconductors |
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FXLS93421 데이터시트(HTML) 80 Page - NXP Semiconductors |
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80 / 254 page  NXP Semiconductors FXLS9xxxx Dual channel inertial sensor Location Bit Address Register 7 6 5 4 3 2 1 0 $40 CH0_CFG_U1 LPF[3:0] SAMPLERATE[1:0] USER_SNS_SHIFT[1:0] $48 CH1_CFG_U1 LPF[3:0] SAMPLERATE[1:0] USER_SNS_SHIFT[1:0] Unprogrammed OTP Value 0 0 0 0 0 0 0 0 Table 137. Channel 0 and Channel 1 user configuration #1 registers (CH0_CFG_U1, CH1_CFG_U1) 11.2.23.1 Low-pass filter and sample rate selection bits (LPF[3:0], SAMPLERATE[1:0]) The low-pass filter selection bits and sample rate bits select the low-pass filter for the associated channel. See Section 11.6.4.4 for details regarding the low-pass filter. Low-pass filter type SAMPLERATE = 00, 01 SAMPLERATE = 10 SAMPLERATE = 11 LPF[3] LPF[2] LPF[1] LPF[0] 16 µs 32 µs 64 µs 0 0 0 0 400 Hz, 4-Pole 200 Hz, 4-Pole 100 Hz, 4-Pole 0 0 0 1 400 Hz, 3-Pole 200 Hz, 3-Pole 100 Hz, 3-Pole 0 0 1 0 400 Hz, 4-Pole 200 Hz, 4-Pole 100 Hz, 4-Pole 0 0 1 1 400 Hz, 3-Pole 200 Hz, 3-Pole 100 Hz, 3-Pole 0 1 0 0 325 Hz, 3-Pole 162.5 Hz, 3-Pole 81.25 Hz, 3-Pole 0 1 0 1 370 Hz, 2-Pole 185 Hz, 2-Pole 92.5 Hz, 2-Pole 0 1 1 0 180 Hz, 2-Pole 90 Hz, 2-Pole 45 Hz, 2-Pole 0 1 1 1 100 Hz, 2-Pole 50 Hz, 2-Pole 25 Hz, 2-Pole 1 0 0 0 1500 Hz, 4-Pole 750 Hz, 4-Pole 375 Hz, 4-Pole 1 0 0 1 500 Hz, 3-Pole 250 Hz, 3-Pole 125 Hz, 3-Pole 1 0 1 0 800 Hz, 4-Pole 400 Hz, 4-Pole 200 Hz, 4-Pole 1 0 1 1 1200 Hz, 4-Pole 600 Hz, 4-Pole 300 Hz, 4-Pole 1 1 0 0 120 Hz, 3-Pole 60 Hz, 3-Pole 30 Hz, 3-Pole 1 1 0 1 20 kHz, 2-Pole 10 kHz, 2-Pole 5 kHz, 2-Pole 1 1 1 0 120 Hz, 2-Pole 60 Hz, 2-Pole 30 Hz, 2-Pole 1 1 1 1 50 Hz, 4-Pole 25 Hz, 4-Pole 12.5 Hz, 4-Pole Table 138. Low-pass filter and sample rate selection bits (LPF[3:0], SAMPLERATE[1:0]) Changes to these register bits reset the DSP data path. The contents of the SNSDATA_x registers are not guaranteed until the DSP has completed initialization as specified in Section 10.20. Reads of the SNSDATA_x registers and Sensor Data requests should be prevented during this time. 11.2.23.2 User sensitivity shift selection bits (U_SNS_SHIFT[1:0]) The user sensitivity selection bits are used along with the user sensitivity multiplier bits to scale the output sensitivity of the device. See Section 11.2.24.1 for details. FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 80 / 254 |
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