HC705E5GRSSLASHD datasheet(41/148 Pages) NXP

41 / 148 page

MC68HC705E5 — Rev. 1.0

General Release Specification

Resets

General Release Specification — MC68HC705E5

Section 5. Resets

5.1 Contents

5.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

5.3

External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

5.4

Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

5.5

Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

5.6

Computer Operating Properly Reset (COPR). . . . . . . . . . . . . .45

5.6.1

Resetting the COP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

5.6.2

COP During Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . .45

5.6.3

COP During Stop Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . .45

5.6.4

COP Watchdog Timer Considerations . . . . . . . . . . . . . . . .46

5.7

Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

5.2 Introduction

The MCU can be reset from five sources: one external input and four

internal restart conditions. The RESET pin is an input with a Schmitt

trigger as shown in Figure 5-1. All the internal peripheral modules will be

reset by the internal reset signal (RST). Refer to Figure 5-2 for reset

timing detail.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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