| 전자부품 데이터시트 검색엔진 |
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HC705E5GRS/D 데이터시트(PDF) 76 Page - NXP Semiconductors |
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HC705E5GRS/D 데이터시트(HTML) 76 Page - NXP Semiconductors |
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76 / 148 page ![]() Motorola Bus (M Bus) Interface General Release Specification MC68HC705E5 — Rev. 1.0 Motorola Bus (M Bus) Interface 11.5.4 Repeated Start Signal As shown in Figure 11-1, a repeated start signal is used to generate a start signal without first generating a stop signal to terminate the communication. This is used by the master to communicate with another slave or with the same slave in a different mode (transmit/receive mode) without releasing the bus. 11.5.5 Stop Signal The master can terminate the communication by generating a stop signal to free the bus. However, the master may generate a start signal followed by a calling command without first generating a stop signal. This is called repeat start. A stop signal is defined as a low-to-high transition of SDA while SCL is at logical high. (See Figure 11-1.) 11.5.6 Arbitration Procedure This interface circuit is a true multimaster system which allows more than one master to be connected to it. If two or more masters try to control the bus at the same time, a clock synchronization procedure determines the bus clock, for which the low period is equal to the longest clock low period and the high is equal to the shortest one among the masters. A data arbitration procedure determines the priority. The masters will lose arbitration if they transmit a logic 1 while another transmits logic 0. The losing masters will immediately switch over to slave receive mode and stop its data and clock outputs. In this case, the transition from master to slave mode will not generate a stop condition; however, a software bit will be set by hardware to indicate loss of arbitration. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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