MPC821 datasheet(202/242 Pages) NXP

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Support Information

MPC860TFADS Daughter Board Design Specification—Rev 0.1

MOTOROLA

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

TSIZ1

x, T.S.

Transfer Size 1. Used in conjunction with TSIZ0 to indicate the

number of bytes remaining in an operand transfer. Not used on

the FADS.

GND

REG_A~

I, T.S., L

In fact TSIZ0/REG~. Transfer Size 0 or PCMCIA slot A REG~.

Used with the PCMCIA port as Attribute memory select or I/O

space select.

GND

A30

I, T.S.

MPC’s Address line 30.

GND

A21

I, T.S.

MPC’s Address line 21.

GND

A20

I, T.S.

MPC’s Address line 20.

GND

I, T.S.

MPC’s Address line 7.

GND

A15

I, T.S.

MPC’s Address line 15.

GND

A14

I, T.S.

MPC’s Address line 14.

GND

A13

I, T.S.

MPC’s Address line 13.

GND

I, T.S.

MPC’s Address line 6.

GND

A12

I, T.S.

MPC’s Address line 12.

GND

A11

I, T.S.

MPC’s Address line 11.

GND

A19

I, T.S.

MPC’s Address line 19.

100

GND

101

I, T.S.

MPC’s Address line 9.

102

GND

103

A18

I, T.S.

MPC’s Address line 18.

104

GND

TABLE 5-9. PM1 Interconnect Signals

Pin No.

Signal Name

Attribute

Description

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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