WM8778

Production Data

w

PD Rev 4.0 April 2005

38

REGISTER MAP

The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The

WM8778 can be configured using the Control Interface. All unused bits should be set to ‘0’.

REGISTER

B

15

B

14

B

13

B

12

B

11

B

10

B

9

B8

B7

B6

B5

B4

B3

B2

B1

B0

DEFAULT

(HEX)

R3 (03h)

0

0

0

0

0

1

1 UPDATED

LDA[7:0]

0FF

R4 (04h)

0

0

0

0

1

0

0 UPDATED

RDA[7:0]

0FF

R5 (05h)

0

0

0

0

1

0

1 UPDATED

MASTDA[7:0]

0FF

R6 (06h)

0

0

0

0

1

1

0

0

0

0

0

0

0

0

PHASE[1:0]

000

R7 (07h)

0

0

0

0

1

1

1

0

PL[3:0]

TOD

IZD

ATC

DZCEN

090

R8 (08h)

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

DMUTE

000

R9 (09h)

0

0

0

1

0

0

1

0

0

0

0

0

0

DZFM [1:0]

DEEMPH

000

R10 (0Ah)

0

0

0

1

0

1

0

0

0

0

DACWL[1:0]

DACBCP

DACLRP

DACFMT[1:0]

022

R11 (0Bh)

0

0

0

1

0

1

1

ADCHPD

0

ADCMCLK

ADCWL[1:0]

ADCBCP

ADCLRP

ADCFMT[1:0]

022

R12 (0Ch)

0

0

0

1

1

0

0

ADCMS

DACMS

DACRATE[2:0]

ADCOSR

ADCRATE[2:0]

022

R13 (ODh)

0

0

0

1

1

0

1

0

0

AINPD

0

0

1

DACPD

ADCPD

PDWN

008

R14 (0Eh)

0

0

0

1

1

1

0

ZCLA

LAG[7:0]

0CF

R15 (0Fh)

0

0

0

1

1

1

1

ZCRA

RAG[7:0]

0CF

R16 (10h)

0

0

1

0

0

0

0

LCSEL[1:0]

MAXGAIN[2:0]

LCT[3:0]

07B

R17 (11h)

0

0

1

0

0

0

1

LCEN

ALCZC

0

0

0

HLD[3:0]

000

R18 (12h)

0

0

1

0

0

1

0

0

DCY[3:0]

ATK[3:0]

032

R19 (13h)

0

0

1

0

0

1

1

0

0

0

0

NGTH[2:0]

0

NGAT

000

R20 (14h)

0

0

1

0

1

0

0

0

1

TRANWIN[2:0]

MAXATTEN[3:0]

0A6

R21 (15h)

0

0

1

0

1

0

1

LRBOTH

MUTELA

MUTERA

0

0

000

R22 (16h)

0

0

1

0

1

1

0

0

0

0

MXBYP

0

MXDAC

001

R23 (17h)

0

0

1

0

1

1

1

SOFTWARE RESET

not reset