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WM8778SEDS/R 데이터시트(PDF) 16 Page - Wolfson Microelectronics plc

부품명 WM8778SEDS/R
상세설명  24-bit, 192kHz Stereo CODEC
PDF  50 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8778SEDS/R 데이터시트(HTML) 16 Page - Wolfson Microelectronics plc

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WM8778
Production Data
w
PD Rev 4.0 April 2005
16
for 192kHz operation where the oversampling rate is 64fs. For ADC operation at 96kHz it is
recommended that the user set the ADCOSR bit. This changes the ADC signal processing
oversample rate to 64fs.
System Clock Frequency (MHz)
128fs
192fs
SAMPLING
RATE
(DACLRC/
ADCLRC)
DAC ONLY
256fs
384fs
512fs
768fs
32kHz
4.096
6.144
8.192
12.288
16.384
24.576
44.1kHz
5.6448
8.467
11.2896
16.9340
22.5792
33.8688
48kHz
6.144
9.216
12.288
18.432
24.576
36.864
96kHz
12.288
18.432
24.576
36.864
Unavailable
Unavailable
192kHz
24.576
36.864
Unavailable Unavailable Unavailable
Unavailable
Table 6 System Clock Frequencies Versus Sampling Rate
In Master mode DACBCLK, ADCBCLK, DACLRC and ADCLRC are generated by the WM8778. The
frequencies of ADCLRC and DACLRC are set by setting the required ratio of DACMCLK to DACLRC
and ADCMCLK to ADCLRC using the DACRATE and ADCRATE control bits (Table 7).
ADCRATE[2:0]/
DACRATE[2:0]
ADCMCLK/DACMCLK:
ADCLRC/DACLRC
RATIO
000
128fs (DAC Only)
001
192fs (DAC Only)
010
256fs
011
384fs
100
512fs
101
768fs
Table 7 Master Mode MCLK:ADCLRC/DACLRC Ratio Select
Table 8 shows the settings for ADCRATE and DACRATE for common sample rates and
ADCMCLK/DACMCLK frequencies.
System Clock Frequency (MHz)
128fs
192fs
256fs
384fs
512fs
768fs
SAMPLING
RATE
(DACLRC/
ADCLRC)
DACRATE
=000
DACRATE
=001
ADCRATE/
DACRATE
=010
ADCRATE/
DACRATE
=011
ADCRATE/
DACRATE
=100
ADCRATE/
DACRATE
=101
32kHz
4.096
6.144
8.192
12.288
16.384
24.576
44.1kHz
5.6448
8.467
11.2896
16.9340
22.5792
33.8688
48kHz
6.144
9.216
12.288
18.432
24.576
36.864
96kHz
12.288
18.432
24.576
36.864
Unavailable
Unavailable
192kHz
24.576
36.864
Unavailable
Unavailable
Unavailable
Unavailable
Table 8 Master Mode ADC/DACLRC Frequency Selection



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