HCS08 datasheet(137/290 Pages) MOTOROLA

137 / 290 page

Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

137

MC9S08GB/GT

Figure 8-9 Port A Registers

PTADn — Port A Data Register Bit n (n = 0–7)

For port A pins that are inputs, reads return the logic level on the pin. For port A pins that are

configured as outputs, reads return the last value written to this register.

Writes are latched into all bits of this register. For port A pins that are configured as outputs, the logic

level is driven out the corresponding MCU pin.

Reset forces PTAD to all 0s, but these 0s are not driven out the corresponding pins because reset also

configures all port pins as high-impedance inputs with pullups disabled.

PTAPEn — Pullup Enable for Port A Bit n (n = 0–7)

For port A pins that are inputs, these read/write control bits determine whether internal pullup devices

are enabled provided the corresponding PTADDn is a logic 0. For port A pins that are configured as

outputs, these bits are ignored and the internal pullup devices are disabled. When any of bits 7 through

4 of port A are enabled as KBI inputs and are configured to detect rising edges/high levels, the pullup

enable bits enable pulldown rather than pullup devices.

1 = Internal pullup device enabled.

0 = Internal pullup device disabled.

PTAD

Bit 7

654321

Bit 0

Read:

PTAD7

PTAD6

PTAD5

PTAD4

PTAD3

PTAD2

PTAD1

PTAD0

Write:

Reset:

00000000

PTAPE

Read:

PTAPE7

PTAPE6

PTAPE5

PTAPE4

PTAPE3

PTAPE2

PTAPE1

PTAPE0

Write:

Reset:

00000000

PTASE

Read:

PTASE7

PTASE6

PTASE5

PTASE4

PTASE3

PTASE2

PTASE1

PTASE0

Write:

Reset:

00000000

PTADD

Read:

PTADD7

PTADD6

PTADD5

PTADD4

PTADD3

PTADD2

PTADD1

PTADD0

Write:

Reset:

00000000

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