AT697F datasheet(63/155 Pages) ATMEL

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AT697F ADVANCE INFORMATION

7703C–AERO–6/09

DSU Memory Map

Table 23.

Address

0x800000c4

DSU UART status register

0x800000c8

DSU UART control register

0x800000cc

DSU UART scaler register

0x90000000

DSU control register

0x90000004

Trace buffer control register

0x90000008

Time tag counter

0x90000010

AHB break address 1

0x90000014

AHB mask 1

0x90000018

AHB break address 2

0x9000001C

AHB mask 2

0x90010000 - 0x90020000

Trace buffer

..0

Trace bits 127 - 96

...4

Trace bits 95 - 64

...8

Trace bits 63 - 32

...C

Trace bits 31 - 0

0x90020000 - 0x90040000

IU/FPU register file

0x90080000 - 0x90100000

IU special purpose registers

0x90080000

Y register

0x90080004

PSR register

0x90080008

WIM register

0x9008000C

TBR register

0x90080010

PC register

0x90080014

NPC register

0x90080018

FSR register

0x9008001C

DSU trap register

0x90080040 - 0x9008007C

ASR16 - ASR31 (when implemented)

0x90100000 - 0x90140000

Instruction cache tags

0x90140000 - 0x90180000

Instruction cache data

0x90180000 - 0x901C0000

Data cache tags

0x901C0000 - 0x90200000

Data cache data

DSU Map

The addresses of the IU/FPU registersis defined according to how many register windows has

been implemented. The registers can be accessed at the following addresses (NWINDOWS =

number of SPARC register windows = 8):

•%on: 0x90020000 + (((psr.cwp * 64) + 32 + n) mod (NWINDOWS*64))

•%ln: 0x90020000 + (((psr.cwp * 64) + 64 + n) mod (NWINDOWS*64))

•%in: 0x90020000 + (((psr.cwp * 64) + 96 + n) mod (NWINDOWS*64))

•%gn: 0x90020000 + (NWINDOWS*64) + 128

•%fn: 0x90020000 + (NWINDOWS*64)

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