WM8946ECSSLASHR datasheet(44/175 Pages) WOLFSON

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WM8946

Production Data

PD, July 2012, Rev 4.3

GAIN READBACK

The gain applied by the DRC can be read from the DRC_GAIN register. This is a 16-bit, fixed-point

value, which expresses the DRC gain as a voltage multiplier.

DRC_GAIN is coded as a fixed-point quantity, with an MSB weighting of 16. The first 7 bits represent

the integer portion; the remaining bits represent the fractional portion. If desired, the value of this field

may be interpreted by treating DRC_GAIN as an integer value, and dividing the result by 512, as

illustrated in the following examples:

DRC_GAIN = 05D4 (hex) = 1380 (decimal)

Divide by 512 gives 2.914 voltage gain, or 4.645dB

DRC_GAIN = 0100 (hex) = 256 (decimal)

Divide by 512 gives 0.5 voltage gain, or -3.01dB

The DRC_GAIN register is defined in Table 19.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R36 (24h)

DRC Status

15:0

DRC_GAIN

[15:0]

DRC Gain value.

This is the DRC gain, expressed as

a voltage multiplier. Fixed point

coding, MSB = 64.

The first 7 bits are the integer

portion; the remaining bits are the

fractional part.

Table 19 DRC Gain Readback

DYNAMIC CHARACTERISTICS

The dynamic behaviour determines how quickly the DRC responds to changing signal levels. Note

that the DRC responds to the peak signal amplitude over a period of time.

The DRC_ATK determines how quickly the DRC gain decreases when the signal amplitude is high.

The DRC_DCY determines how quickly the DRC gain increases when the signal amplitude is low.

These register fields are described in Table 20. Note that the register defaults are suitable for general

purpose microphone use.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R31 (1Fh)

DRC Control 3

7:4

DRC_ATK [3:0]

0100

Attack rate relative to input signal

(seconds/6dB)

0000 = Reserved

0001 = 181us

0010 = 363us

0011 = 726us

0100 = 1.45ms

0101 = 2.9ms

0110 = 5.8ms

0111 = 11.6ms

1000 = 23.2ms

1001 = 46.4ms

1010 = 92.8ms

1011 = 185.6ms

1100-1111 = Reserved

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