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WM8946ECS/R 데이터시트(PDF) 69 Page - Wolfson Microelectronics plc

부품명 WM8946ECS/R
상세설명  Stereo Low-Power CODEC with Video Buffer
PDF  175 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

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Production Data
WM8946
w
PD, July 2012, Rev 4.3
69
OUTPUT DISCHARGE CONTROL
The line outputs and speaker outputs can be actively discharged to GND through internal resistors if
desired. This is desirable at start-up in order to achieve a known output stage condition prior to
enabling the soft-start VMID reference voltage. This is also desirable in shut-down to prevent the
external connections from being affected by the internal circuits.
The individual control bits for discharging each audio output are described in Table 44.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R42 (2Ah)
Output ctrl
7
SPKR_DISCH
0
Discharges SPKOUTR output via
approx 4k resistor
0 = Not active
1 = Actively discharging SPKOUTR
6
SPKL_DISCH
0
Discharges SPKOUTL output via
approx 4k resistor
0 = Not active
1 = Actively discharging SPKOUTL
5
LINER_DISCH
0
Discharges LINEOUTR output via
approx 4k resistor
0 = Not active
1 = Actively discharging LINEOUTR
4
LINEL_DISCH
0
Discharges LINEOUTL output via
approx 4k resistor
0 = Not active
1 = Actively discharging LINEOUTL
Table 44 Output Discharge Control
DIGITAL AUDIO INTERFACE
The digital audio interface is used for inputting DAC data into the WM8946 and outputting ADC data
from it. It uses four pins:
ADCDAT: ADC data output
DACDAT: DAC data input
LRCLK: DAC and ADC data alignment clock
BCLK: Bit clock, for synchronisation
MASTER AND SLAVE MODE OPERATION
The digital audio interface can be configured as a Master or a Slave interface, using the MSTR
register bit. The two modes are illustrated in Figure 21 and Figure 22.
WM8946
ADCDAT
LRCLK
DACDAT
BCLK
Processor
Figure 21 Master Mode
Figure 22 Slave Mode



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