WM8946ECSSLASHR datasheet(66/175 Pages) WOLFSON

66 / 175 page

WM8946

Production Data

PD, July 2012, Rev 4.3

REFERENCE VOLTAGES AND MASTER BIAS

This section describes the analogue reference voltage and bias current controls. It also describes the

VMID soft-start circuit for pop suppressed start-up and shut-down.

The analogue circuits in the WM8946 require a mid-rail analogue reference voltage, VMID. This

reference is generated via a programmable resistor chain. Together with the external decoupling

capacitor (connected to the VMIDC pin), the programmable resistor chain results in a slow, normal or

fast charging characteristic on the VMID reference. This is enabled using VMID_ENA and

VMID_SEL. The different resistor options controlled by VMID_SEL can be used to

optimize the

reference for normal operation, low power standby or for fast start-up as described in Table 41.

The VMID resistor chain can be powered from the LDO output (LDOVOUT) or from the LDO supply

(LDOVDD). This is selected using VMID_REF_SEL. .

Note that when VMID is selected as the LDO reference voltage, VMID cannot be generated from the

LDOVOUT supply voltage (VMID_REF_SEL = 1) and must be generated from the LDOVDD supply

voltage (VMID_REF_SEL = 0).

The VMID ratio can be selected using VMID_CTRL. This selects the ratio of VMID to the supply

voltage that has been selected by VMID_REF_SEL. VMID should be half of the LDOVOUT supply

voltage for maximum voltage swing. In the case where VMID_REF_SEL has selected the LDOVOUT

supply voltage output, then VMID_CTRL should select the ratio “1/2”. In the case where

VMID_REF_SEL has selected the LDOVDD supply voltage, then the alternate ratio “5/11” may be

preferred provided LDOVDDD = 3.3V and LDOVOUT = 3.0V.

Note that the “5/11” ratio is designed for the case where LDOVDD = 3.3V and LDOVOUT = 3.0V. This

results in a VMID = 3.3V x (5/11) = 1.5V which is half of the LDOVOUT voltage.

If these conditions are not being used or the LDO has been bypassed then VMID_REF should be set

to select LDOVOUT as the VMID source and VMID_CTRL should be set to select the ratio “1/2”.

The analogue circuits in the WM8946 require a bias current. The normal bias current is enabled by

setting BIAS_ENA. Note that the normal bias current source requires VMID to be enabled also.

The Master Reference and Bias Control bits are defined in Table 41.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R7 (07h)

Additional

control

VMID_REF_SEL

VMID Source Select

0 = LDO supply (LDOVDD)

1 = LDO output (LDOVOUT)

VMID_CTRL

VMID Ratio control

Sets the ratio of VMID to the source

selected by VMID_REF_SEL

0 = 5/11

1 = 1/2

VMID_ENA

VMID Enable

0 = Disabled

1 = Enabled

R2 (02h)

Power

Management

BIAS_ENA

Master Bias Enable

0 = Disabled

1 = Enabled

1:0

VMID_SEL [1:0]

VMID Divider Enable and Select

00 = VMID disabled (for OFF mode)

01 = 2 x 50k

 divider (for normal

operation)

10 = 2 x 250k

 divider (for low

power standby)

11 = 2 x 5k

 divider (for fast start-

up)

Table 41 Reference Voltages and Master Bias Enable

WM8946ECS/R 데이터시트(PDF) 66 Page - Wolfson Microelectronics plc

WM8946ECS/R 데이터시트(HTML) 66 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL