WM8946ECSSLASHR datasheet(47/175 Pages) WOLFSON

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Production Data

WM8946

PD, July 2012, Rev 4.3

DRC INITIAL VALUE

The DRC can be set up to a defined initial condition based on the expected signal level when the

DRC is enabled. This can be set using the DRC_INIT bits in register R35 (23h) bits 4 to 0.

Note: This does NOT set the initial gain of the DRC. It sets the expected signal level of the DRC input

signal when the DRC is enabled.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R35 (23h)

DRC Control 7

4:0

DRC_INIT

00000

Initial value at DRC startup

00000 = 0dB

00001 = -3.75dB

… (-3.75dB steps)

11111 = -116.25dB

Table 23 DRC Initial Value

DIGITAL-TO-ANALOGUE CONVERTER (DAC)

The WM8946 DACs receive digital input data from the digital audio interface. (Note that, depending

on the DSP Configuration mode, the digital input may first be processed and filtered in the DSP

Core.) The digital audio data is converted to oversampled bit-streams in the on-chip, true 24-bit digital

interpolation filters. The bit-stream data enters two multi-bit, sigma-delta DACs, which convert them to

high quality analogue audio signals.

The analogue outputs from the DACs can then be mixed with other analogue inputs before being sent

to the analogue output pins (see “Output Signal Path”).

The DACs are enabled by the DACL_ENA and DACR_ENA register bits.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R3 (03h)

Power

Management

DACR_ENA

Right DAC Enable

0 = Disabled

1 = Enabled

DACR_ENA must be set to 1 when

processing right channel data from

the DAC or Digital Beep Generator.

DACL_ENA

Left DAC Enable

0 = Disabled

1 = Enabled

DACR_ENA must be set to 1 when

processing left channel data from

the DAC or Digital Beep Generator.

Table 24 DAC Enable Control

Note: If the WM8946 is to be used in mono mode for playback then the left and right DACs must both

be enabled.

DAC DIGITAL VOLUME CONTROL

The output of the DACs can be digitally amplified or attenuated over a range from -71.625dB to

+23.625dB in 0.375dB steps. The volume of each channel can be controlled separately using

DACL_VOL or DACR_VOL. The DAC Volume is part of the DAC Digital Filters block. The gain for a

given eight-bit code X is given by:

0.375

 (X-192) dB for 1  X  255;

MUTE for X = 0

The DAC_VU bit controls the loading of digital volume control data. When DAC_VU is set to 0, the

DACL_VOL or DACR_VOL control data is loaded into the respective control register, but does not

actually change the digital gain setting. Both left and right gain settings are updated when a 1 is

written to DAC_VU. This makes it possible to update the gain of both channels simultaneously.

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