WM8946ECSSLASHR datasheet(75/175 Pages) WOLFSON

부품명	WM8946ECS/R

상세설명	Stereo Low-Power CODEC with Video Buffer

PDF	175 Pages

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제조업체	WOLFSON [Wolfson Microelectronics plc]

홈페이지	http://www.wolfsonmicro.com

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75 / 175 page

Production Data

WM8946

PD, July 2012, Rev 4.3

A-law Companding

100

120

0.2

0.4

0.6

0.8

Normalised Input

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Figure 30 A-Law Companding

The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted

for

-law, all even data bits are inverted for A-law). Companded data is transmitted in the first 8 MSBs

of its respective data word, and consists of sign (1 bit), exponent (3 bits) and mantissa (4 bits), as

shown in Table 48.

BIT7

BIT[6:4]

BIT[3:0]

SIGN

EXPONENT

MANTISSA

Table 48 8-bit Companded Word Composition

8-bit mode is selected whenever DAC_COMP=1 or ADC_COMP=1. The use of 8-bit data allows

samples to be passed using as few as 8 BCLK cycles per Left/Right Clock frame. When using DSP

mode B, 8-bit data words may be transferred consecutively every 8 BCLK cycles.

8-bit mode (without Companding) may be enabled by setting DAC_COMPMODE=1 or

ADC_COMPMODE=1, when DAC_COMP=0 and ADC_COMP=0.

WM8946ECS/R 데이터시트(PDF) 75 Page - Wolfson Microelectronics plc