WM8946ECSSLASHR datasheet(106/175 Pages) WOLFSON

106 / 175 page

WM8946

Production Data

PD, July 2012, Rev 4.3

106

RECOMMENDED POWER UP / POWER-DOWN SEQUENCES

In order to minimise output pop and click noise, it is recommended that the WM8946 device is

powered-up and powered-down using the control sequences described in Table 69 and Table 70

respectively.

The power-up sequence described here includes enabling the DACs and output drivers; note that

additional configuration will be required to enable the required internal signal paths.

The sequences noted here are provided as guidance only; each sequence will require to be adjusted

to the particular application requirements.

DESCRIPTION

LABEL

Turn on external supplies and wait for the supply voltages to

settle.

Reset registers to default state (software reset)

SW_RESET

R0 (00h) [15:0]

Enable speaker and line discharge bits

SPKR_DISCH = 1

SPKL_DISCH = 1

LINER_DISCH = 1

LINEL_DISCH = 1

R42 (2Ah) [7]

R42 (2Ah) [6]

R42 (2Ah) [5]

R42 (2Ah) [4]

Enable VMID to speaker and line outputs

SPKR_VMID_OP_ENA = 1

SPKL_VMID_OP_ENA = 1

LINER_VMID_OP_ENA = 1

LINEL_VMID_OP_ENA = 1

R42 (2Ah) [13]

R42 (2Ah) [12]

R42 (2Ah) [11]

R42 (2Ah) [10]

Enable VMID Fast Start and Start up Bias

Select Start-Up Bias and set VMID soft start for start-up ramp

VMID_FAST_START = 1

STARTUP_BIAS_ENA = 1

BIAS_SRC = 1

VMID_RAMP[1:0] = 01

R7 (07h) [11]

R7 (07h) [8]

R7 (07h) [7]

R7 (07h) [6:5]

If using VMID as the reference voltage for the LDO then

select VMID fast start or set to 0 if using the Bandgap as the

reference voltage for LDO.

Select LDO Start-Up Bias and enable LDO

Delay 300ms for LDO to settle

LDO_REF_SEL_FAST = 1

LDO_BIAS_SRC = 1

LDO_ENA = 1

R53 (35h) [14] R53

(35h) [5]

R53 (35h) [15]

Enable VMID Buffer and Master Bias

Set VMID_SEL[1:0] for fast start-up

BIAS_ENA = 1 VMID_BUF_ENA = 1

VMID_SEL[1:0] = 11

R2 (02h) [3]

(02h) [2]

R2 (02h) [1:0]

Disable speaker and line discharge bits

SPKP_DISCH = 0

SPKN_DISCH = 0

LINER_DISCH = 0

LINEL_DISCH = 0

R42 (2Ah) [6]

R42 (2Ah) [7]

R42 (2Ah) [5]

R42 (2Ah) [4]

Enable speaker mixer and DAC

SPKR_MIX_ENA = 1

SPKL_MIX_ENA = 1

DACR_ENA = 1

DACL_ENA = 1

R3 (03h) [3]

R3 (03h) [2]

R3 (03h) [1]

R3 (03h) [0]

Enable speaker outputs and speaker PGA and lineout output

as required

OUTR_ENA = 1

OUTL_ENA = 1

SPKR_PGA_ENA = 1

SPKL_PGA_ENA = 1

SPKN_OP_ENA = 1

SPKP_OP_ENA = 1

R3 (03h) [15]

R3 (03h) [14]

R3 (03h) [13]

R3 (03h) [12]

R3 (03h) [7]

R3 (03h) [6]

Enable power to speaker drive

SPKR_SPKVDD_ENA = 1

SPKL_ SPKVDD _ENA = 1

R3 (03h) [11]

R3 (03h) [10]

Enable VMID

Delay 150ms to allow VMID to settle

VMID_ENA = 1

R7 (07h) [4]

Set LDO for normal operation

LDO_REF_SEL_FAST = 0

R53 (35h) [14]

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