전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

V62/12615-01XE-R 데이터시트(PDF) 16 Page - Texas Instruments

Click here to check the latest version.
부품명 V62/12615-01XE-R
상세설명  PHYTER MILITARY TEMPERATURE SINGLE PORT 10/100 MB/S ETHERNET PHYSICAL LAYER TRANSCEIVER
PDF  92 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

V62/12615-01XE-R 데이터시트(HTML) 16 Page - Texas Instruments

Back Button V62/12615-01XE-R Datasheet HTML 12Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 13Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 14Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 15Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 16Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 17Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 18Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 19Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 20Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 92 page
background image
DP83848-EP
SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013
www.ti.com
Table 2-8. 10 Mb/s and 100 Mb/s PMD Interface
TERMINAL
I/O
DESCRIPTION
NAME
NO.
Differential common driver transmit output (PMD Output Pair). These differential outputs are automatically
configured to either 10BASE-T or 100BASE-TX signaling.
TD-, TD+
16, 17
I/O
In Auto-MDIX mode of operation, this pair can be used as the Receive Input pair.
These pins require 3.3V bias for operation.
Differential receive input (PMD Input Pair). These differential inputs are automatically configured to accept either
100BASE-TX or 10BASE-T signaling.
RD-, RD+
13, 14
I/O
In Auto-MDIX mode of operation, this pair can be used as the Transmit Output pair.
These pins require 3.3V bias for operation.
Table 2-9. Special Connections
TERMINAL
I/O
DESCRIPTION
NAME
NO.
RBIAS
24
I
Bias Resistor Connection. A 4.87 k
Ω 1% resistor should be connected from RBIAS to GND.
Power Feedback Output. Parallel caps, 10
μ F (Tantalum preferred) and 0.1μF, should be placed close to the
PFBOUT
23
O
PFBOUT. Connect this pin to PFBIN1 (pin 18) and PFBIN2 (pin 37). See Section 5.4 for proper placement pin.
Power Feedback Input. These pins are fed with power from PFBOUT pin. A small capacitor of 0.1
μF should be
PFBIN1
18
I
connected close to each pin.
PFBIN2
37
Note: Do not supply power to these pins other than from PFBOUT.
RESERVED
20, 21
I/O
RESERVED: These pins must be pulled-up through 2.2 k
Ω resistors to AVDD33 supply.
Table 2-10. Power Supply Pins
TERMINAL
DESCRIPTION
NAME
NO.
IOVDD33
32, 48
I/O 3.3V Supply
IOGND
35, 47
I/O Ground
DGND
36
Digital Ground
AVDD33
22
Analog 3.3V Supply
AGND
15, 19
Analog Ground
GNDPAD
Thermal Pad
16
OVERVIEW
Copyright © 2012–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DP83848-EP



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com