V62SLASH12615-01XE-R datasheet(63/92 Pages) TI1

63 / 92 page

DP83848-EP

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SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013

RESET OPERATION

The DP83848 includes an internal power-on reset (POR) function and does not need to be explicitly reset

for normal operation after power up. If required during normal operation, the device can be reset by a

hardware or software reset.

8.1

Hardware Reset

A hardware reset is accomplished by applying a low pulse (TTL level), with a duration of at least 1

μs, to

the RESET_N. This will reset the device such that all registers will be reinitialized to default values and the

hardware configuration values will be re-latched into the device (similar to the power-up/reset operation).

8.2

Software Reset

A software reset is accomplished by setting the reset bit (bit 15) of the basic mode control register

(BMCR). The period from the point in time when the reset bit is set to the point in time when software

reset has concluded is approximately 1

μs.

The software reset will reset the device such that all registers will be reset to default values and the

hardware configuration values will be maintained. Software driver code must wait 3

μs following a software

reset before allowing further serial MII operations with the DP83848.

RESET OPERATION

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