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V62/12615-01XE-R 데이터시트(PDF) 26 Page - Texas Instruments

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부품명 V62/12615-01XE-R
상세설명  PHYTER MILITARY TEMPERATURE SINGLE PORT 10/100 MB/S ETHERNET PHYSICAL LAYER TRANSCEIVER
PDF  92 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

V62/12615-01XE-R 데이터시트(HTML) 26 Page - Texas Instruments

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RX_CLK
RXD[3:0]
RX_DV
Valid data
T2.12.2
T2.12.3
T2.12.1
T2.12.1
TX_CLK
TXD[3:0]
TX_EN
Valid data
T2.11.1
T2.11.1
T2.11.2
T211.3
DP83848-EP
SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013
www.ti.com
3.5.11 10 Mb/s MII Transmit Timing
Figure 3-12. 10 Mb/s MII Transmit Timing
xxx
PARAMETER
DESCRIPTION
NOTES(1)
MIN
TYP
MAX
UNIT
T2.11.1
TX_CLK High/Low Time
10 Mb/s MII mode
190
200
210
ns
T2.11.2
TXD[3:0], TX_EN Data Setup to
10 Mb/s MII mode
24.70
ns
TX_CLK fall
T2.11.3
TXD[3:0], TX_EN Data Hold from
10 Mb/s MII mode
0
ns
TX_CLK rise
(1)
An attached Mac should drive the transmit signals using the positive edge of TX_CLK. As shown above, the MII signals are sampled on
the falling edge of TX_CLK.
3.5.12 10 Mb/s MII Receive Timing
Figure 3-13. 10 Mb/s MII Receive Timing
xxx
PARAMETER
DESCRIPTION
NOTES(1)
MIN
TYP
MAX
UNIT
T2.12.1
RX_CLK High/Low Time
160
200
240
ns
T2.12.2
RX_CLK to RXD[3:0], RX_DV
10 Mb/s MII mode
100
ns
Delay
T2.12.3
RX_CLK rising edge delay from
10 Mb/s MII mode
100
ns
RXD[3:0], RX_DV Valid
(1)
RX_CLK may be held low for a longer period of time during transition between reference and recovered clocks. Minimum high and low
times will not be violated.
26
ELECTRICAL SPECIFICATIONS
Copyright © 2012–2013, Texas Instruments Incorporated
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Product Folder Links: DP83848-EP



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