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V62/12615-01XE-R 데이터시트(PDF) 71 Page - Texas Instruments

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부품명 V62/12615-01XE-R
상세설명  PHYTER MILITARY TEMPERATURE SINGLE PORT 10/100 MB/S ETHERNET PHYSICAL LAYER TRANSCEIVER
PDF  92 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

V62/12615-01XE-R 데이터시트(HTML) 71 Page - Texas Instruments

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DP83848-EP
www.ti.com
SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013
9.2.5
Auto-Negotiation Advertisement Register (ANAR)
This register contains the advertised abilities of this device as they will be transmitted to its link partner
during Auto-Negotiation.
Table 9-7. Negotiation Advertisement Register (ANAR), Address 0x04
BIT
BIT NAME
DEFAULT
DESCRIPTION
Next Page Indication:
15
NP
0, RW
0 = Next Page Transfer not desired
1 = Next Page Transfer desired
14
RESERVED
0, RO/P
RESERVED by IEEE: Writes ignored, Read as 0
Remote Fault:
13
RF
0, RW
1 = Advertises that this device has detected a Remote Fault
0 = No Remote Fault detected
12
RESERVED
0, RW
RESERVED for Future IEEE use: Write as 0, Read as 0
Asymmetric PAUSE Support for Full Duplex Links:
The ASM_DIR bit indicates that asymmetric PAUSE is supported.
Encoding and resolution of PAUSE bits is defined in IEEE 802.3
Annex 28B, Tables 28B-2 and 28B-3, respectively. Pause resolution
11
ASM_DIR
0, RW
status is reported in PHYCR[13:12].
1 = Advertise that the DTE (MAC) has implemented both the optional
MAC control sublayer and the pause function as specified in clause 31
and annex 31B of 802.3u.
0 = No MAC based full duplex flow control
PAUSE Support for Full Duplex Links:
The PAUSE bit indicates that the device is capable of providing the
symmetric PAUSE functions as defined in Annex 31B.
Encoding and resolution of PAUSE bits is defined in IEEE 802.3
Annex 28B, Tables 28B-2 and 28B-3, respectively. Pause resolution
10
PAUSE
0, RW
status is reported in PHYCR[13:12].
1 = Advertise that the DTE (MAC) has implemented both the optional
MAC control sublayer and the pause function as specified in clause 31
and annex 31B of 802.3u.
0= No MAC based full duplex flow control
100BASE-T4 Support:
9
T4
0, RO/P
1 = 100BASE-T4 is supported by the local device
0 = 100BASE-T4 not supported
100BASE-TX Full Duplex Support:
8
TX_FD
Strap, RW
1 = 100BASE-TX Full Duplex is supported by the local device
0 = 100BASE-TX Full Duplex not supported
100BASE-TX Support:
7
TX
Strap, RW
1 = 100BASE-TX is supported by the local device
0 = 100BASE-TX not supported
10BASE-T Full Duplex Support:
6
10_FD
Strap, RW
1 = 10BASE-T Full Duplex is supported by the local device
0 = 10BASE-T Full Duplex not supported
10BASE-T Support:
5
10
Strap, RW
1 = 10BASE-T is supported by the local device
0 = 10BASE-T not supported
Protocol Selection Bits:
4:0
Selector
<00001>, RW
These bits contain the binary encoded protocol selector supported by
this port. <00001> indicates that this device supports IEEE 802.3u.
Copyright © 2012–2013, Texas Instruments Incorporated
REGISTER BLOCK
71
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Product Folder Links: DP83848-EP



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