CC1110-RTR1 datasheet(50/203 Pages) TI

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CC1110

CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A

Page 50 of 202

TCON (0x88) – Interrupt Flag

Bit

Name

Reset

R/W

Description

URX1IF – USART1 RX interrupt flag. Set to 1 when USART1 RX

interrupt occurs and cleared when CPU vectors to the interrupt

service routine.

Interrupt not pending

URX1IF

R/W

Interrupt pending

R/W

Not used

ADIF – ADC interrupt flag. Set to 1 when ADC interrupt occurs and

cleared when CPU vectors to the interrupt service routine.

Interrupt not pending

ADIF

R/W

Interrupt pending

R/W

Not used

URX0IF – USART0 RX interrupt flag. Set to 1 when USART0

interrupt occurs and cleared when CPU vectors to the interrupt

service routine.

Interrupt not pending

URX0IF

R/W

Interrupt pending

IT1

R/W

Reserved. Must always be set to 1.

RFTXRXIF – RF TX/RX complete interrupt flag. Set to 1 when

RFTXRX interrupt occurs and cleared when CPU vectors to the

interrupt service routine.

Interrupt not pending

RFTXRXIF

R/W

Interrupt pending

IT0

R/W

Reserved. Must always be set to 1.

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